Conventionally, capacitor structures for integrated circuits comprise either a flat plate capacitor structure or a trench capacitor structure. Flat plate capacitors typically comprise first and second layers of conductive material patterned to define top and bottom electrodes, with an intervening layer of a thin capacitor dielectric, the structure being isolated from the substrate by an underlying dielectric layer, e.g. by formation of the capacitor structure on top of a thick field isolation oxide layer. The bottom electrode typically comprises a layer of conductive material, e.g. polysilicon, which forms other structures of the integrated circuit, e.g. gate electrodes or emitter structures of transistors. The second (top) electrode is defined thereon by a second conductive layer, typically another polysilicon layer. The capacitor dielectric is conventionally a thin silicon dioxide or silicon nitride layer. Recently other dielectric materials including tantalum oxide and ferroelectric dielectrics are being used for capacitor dielectrics. However, the latter usually require special electrode materials and barrier layers to prevent reactions between the ferroelectric dielectric and electrode materials.
Trench capacitors are conventionally formed by conductive and dielectric layers provided within trench regions defined in the substrate, e.g. by patterning concentrically arranged vertical electrodes. Another approach to a trench capacitor structure is described in U.S. Pat. No. 5,275,974 to Ellul et al. and is based on a method of deposition of conformal layers of conductive and dielectric materials within trench regions, which are then planarized by chemical mechanical polishing to provide for coplanar contacts to each electrode.
Various other schemes are known for increasing the capacitance per unit area, for example a stacked metal-insulator-metal capacitor for a DRAM, as described in U.S. Pat. No. 5,142,639 to Koyhama. U.S. Pat. No. 5,189,594 to Hoshiba describes a capacitor having comb like electrodes which intersect to provide a plurality of small value capacitors connected in parallel. Examples of multilayer metal-insulator-metal capacitors are described in Japanese patent applications J6210467 to Katsumata and J59055049 to Suzuki.
However, in either flat plate or trench capacitors, the capacitor dielectric thickness is a major factor in determining the capacitance per unit area. Thin dielectrics are required to increase the capacitance per unit area, i.e. to allow for smaller area capacitors, as required for high density integrated circuits. The drawback is that thinner dielectrics result in lower breakdown voltages. Typical known capacitor structures with thin dielectrics used for 3.3 V and 5 V integrated circuits, for example, have breakdown voltages of .about.16 V. For operation of integrated circuits at a higher voltage, e.g. 12 V typically used for some telecommunications applications, a breakdown voltage of 16 V would be insufficient.
Thus, for the latter high voltage applications, different capacitor structures are required to obtain reduced area devices with high capacitance and higher breakdown voltages (.about.100 V). Further, high frequency response, in the GHz range, is also an important consideration for applications of advanced bipolar-CMOS integrated circuits, e.g. for telecommunications applications.